The present invention relates to a FIFO memory having a modifiable memory region; the FIFO memory being configured as a linear memory; the FIFO memory being configured as a circular buffer; the FIFO memory having a state machine that contains a base pointer “base,” a top pointer “top,” a write pointer “wr,” and a read pointer “rd”; the FIFO memory containing a currently allocated memory region whose lower boundary is defined by the base pointer “base” and whose upper boundary is defined by the top pointer “top”; the write pointer “wr” defining the current write address and the read pointer “rd” defining the current read address.
A FIFO is usually implemented as a circular buffer having a fixed size, and can contain a specific number of data elements:                http://en.wikipedia.org/wiki/Circular_buffer        
If more memory is required than is configured for the circular buffer, there are two methods for dealing with this:                1. New data elements cannot be accepted into the circular buffer.        2. New data elements are written into the circular buffer after the oldest elements are deleted from the buffer.        
This entails losing either new data (1.) or data history (2.). If neither of the two methods is acceptable, the buffer must be enlarged.
Most methods for changing FIFO sizes refer to software implementations in which buffers in the memory are reallocated or the buffer contents are copied over from a small buffer into a larger one. The mechanisms used here are ones that are not available, or are inefficient and cumbersome, in a hardware implementation.
Another conventional approach uses a standard region and an expansion region in the memory. If the FIFO needs to be enlarged, data are first written into the expansion region so that at the next pass, that region can be integrated into the standard region. See, for example:                http://blog.labix.org/2010/12/23/efficient-algorithm-for-expanding-circular-buffers        